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> 1 pc. amd# amd-8131BLC, hyper transport pci-x tunnel
1 pc. amd# amd-8131BLC, hyper transport pci-x tunnel
HyperTransport technology tunnel with side A
Side A is 16 bits (input and output); side B is
Either side may connect to the host or to a
downstream HyperTransport technology
Each side supports HyperTransport technology-
defined reduced bit widths: 8-bit, 4-bit,
Each side supports transfer rates of 1600,
1200, 800, and 400 mega-transfers per second.
Maximum bandwidth is 6.4 gigabytes per
downstream) and 3.2 gigabytes per second
Independent transfer rate and bit width
Link disconnect protocol supported.
Two PCI-X (rev. 1.0) bridges: bridge A and
Each bridge supports a 64-bit data bus.
Each bridge supports operational modes of
PCI-X and legacy PCI revision 2.2 protocol.
Bridges support 133, 100, and 66 MHz
Bridges support 66 and 33 MHz transfer
Independent transfer rates and operational
Each bridge includes support for up to 5 PCI
masters with clock, request, and grant signals.
Each bridge includes an IOAPIC with four
redirection registers. Legacy interrupt controller
SHPC-compliant hot plug controller and
37.5 x 37.5 millimeter, 829-pin BGA package.
3.3 volt PCI-X signaling; 1.2 volt link signaling;
